MEMS Fusion – Challenges in Final Test

Abstract:

Sensors and MEMS applications are drastically increasing. Almost any area of today’s lives uses their advantages. In general this has two implications:

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Enabling Highly Parallel Test SOCs, Sensors and 3D Packages

Abstract:

Testers are struggling to keep up with Moore’s Law by integrating more channels, power supplies, and analog resources per board.  DFT and adaptive test are driving shorter test times. Memory testers can currently test 256/512 devices in parallel, enabled by highly parallel handling capability. What is the future path of SOC/Sensor test?

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Debugging of DSP Measurements

Abstract:

Using DSP techniques for making automatic measurements often presents unique challenges. Most of the time, they provide fast accurate measurement of AC signals. At times, these techniques will generate erroneous results. While the results may not be what is expected, the numerical results often give no clue to what need to be corrected.

This paper will explore the vulnerabilities of DSP measurements. It will also present techniques for determining what effects are responsible for different types of problems encountered in sinewave measurements.

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Advanced Power Amplifier Testing

Abstract:

This paper is intended to provide the extra edge in getting precise correlation and achieving excellent measurement repeatability in minimal test time with proven test techniques. A myriad of Power Amplifier test techniques and development guidelines are documented to achieve the above goals.

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Signal Analysis of non-Unit Test Period Data

Abstract:

Standard testing of mixed signal components is generally implemented by digitizing an integer number of cycles of a waveform, and performing an FFT (if the number of collected points is of the form 2N), or a DFT. If the signal being measured does not include an integer number of cycles of the input, and the number of collected points is of the form 2N, a weighting function must be applied to suppress unwanted artifacts created by the analysis. This paper describes a mathematical approach, using a curve-fit algorithm, which permits the extraction of data in cases where the frequency of the tested signal bears a much less restrictive relationship to the sampling frequency. The implementation of the algorithm the LTX-Credence X-Series envision (Cadence) software is described.

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DSP Measurement of Under-Settled Signals

Abstract:

This paper explores the effects of settling transients on DSP sinewave measurements and techniques that allow measurements to begin before settling is complete. It shows the effects of many settling transients can be virtually eliminated.

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Testing High Speed, High Accuracy Analog to Digital Converters in ADC Embeeded in System-On-Chip

Abstract:

High speed, high accuracy ADC’s built on SOC IC’s tested on digital testers with round-trip-delays, must measure INL, DNL, Gain and Offset. Algorithm efficiencies and round-trip-delay sensitivity are analysed. Efficient test methods are described.

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Balancing Economic Growth with Reduces CO2 Emission – A Worldwide Challenge

Abstract:

In today’s hyper-competitive global economy, manufacturers worldwide are increasingly challenged with the need to manage a profitable business while balancing energy reduction requirements imposed by their country’s CO2 emissions reduction goals.

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