Analog and low pin count device test cells may often use ‘turret’ style handlers, in which each stage can be configured to do a specific back-end process task in a serial manner.
Due to this serial, single flow “production line” design, a turret handler approach adds inefficiencies. The whole process only goes as fast as the slowest stage. The overall UPH decreases significantly as test time increases. The classical multisite test is non-ideal and adds a significant overhead to the process flow.