Fan-In WLCSP Test Strategy


Wafer Level Chip Scale Package (WLCSP) devices are used because they offer very low cost, small footprint packages to be directly mounted into smartphones, tablets, other mobile devices and automotive applications. The type of technologies targeted for fan-in WLCSP packaging includes PMICs, transceivers, microcontrollers, IoT applications, MEMS and more.

This paper will explore how the demand from system manufacturers for lower defect parts per million (DPPM) from their suppliers is changing the back end processing of these devices.

Today, the backend process flow for WLCSP devices is a single insertion test at wafersort. With this flow, there is no testing done after device singulation (wafer saw). The reason for this flow is that there has been no cost effective way to handle singulated WLCSP devices in high volume manufacturing environment. Other challenges include requirements for increased vision inspection to detect devices that may exhibit early life failures.

The industry is looking for ways to cost effectively increase the outgoing quality of these devices. This paper reviews the different challenges and techniques for enabling post saw test.

Challenges to be explored include

  • high volume manufacturing at low cost
  • accuracy requirements for highest possible yield at full multi-site
  • temperature testing
  • support for MEMS applications
  • vision inspection


Version: December 2017
Presented by: Nigel Beddoe
Presented at: SEMICON Japan

Version: October 2017
Presented by: Mike Frazier
Presented at: IWLPC

Version: April 2017
Presented by: Mike Frazier
Presented at: SEMICON Southeast Asia

Version: March 2017
Presented by: Mike Frazier
Presented at: BiTS