This paper works to create a level playing field for interpreting, communication, and apply the electrical and mechanical specifications that describe test probe performance. Presented will be lab data describing the performance of Wafer Level Chip Scale Package (WLCSP) contacting technology.
Over the past decade, probe head designers have been challenged by several trends in semiconductor packaging. The most notably trend is a narrowing in the WLCSP “pitch” between balls, pumps pillars, and pads along with an increase in operating frequencies and a reduction of operating voltage.
Version: March 2018
Presented by: Bert Brost
Presented at: SEMiSRAEL