Posts

Comparison of Different Methods in Determining Current Carrying Capacity of Semiconductor Test Contacts

Abstract:

As has been pointed out by various presenters at BiTS, there is no one consistent method for measuring, determining, and specifying Current Carrying Capacity (CCC) in test socket interconnects. This presentation will review existing test methods and compare advantages and disadvantages of each method.

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Are New Temperature Test Strategies Needed? Meeting Performance and Cost Requirements of Today´s Applications

Abstract:

Traditionally final test of semiconductors at the full temperature range from cold (- 55°C) up to hot (+175°C) is strongly related to automotive applications.

Due to the nature of the end applications any failure would be a possible cause of most serious – even live-threatening – consequences.

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Benefits and Risks of High Aspect Ratio vias in ATE boards

Abstract:

This presentation explains the benefits and risks of high-aspect-ratio though-hole vias in high-density and fine-pitch printed circuit boards used in the test interface. Users are facing challenges as I/O counts increase, circuitry requirements have added to ATE PCB density, and array packages shrink below 0.65 mm pitch.

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